Ben Lancaster

Graduate Hardware Engineer at ARM working on on-chip interconnects

[email protected]


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Graduate Hardware Engineer

ARM — United Kingdom — September 2019-present

  • Microarchitectural RTL Design and verification for SoC interconnects, MMUs, ...
  • Formal verification using SVA.

Firmware Engineer Placement

Spirent Communications PLC — United Kingdom — 2016-2017 (16 months)

  • Embedded programming on Xilinx MicroBlaze FPGAs and PIC16/24 microcontrollers.
  • Implemented on-chip power levelling and calibration for GNSS RF signal generators.
  • Controlling on-board fans, LEDs, EEPROM, and other peripherals with I2C and SMBus.
  • Configuring, building, and maintaining Embedded Linux distributions using Yocto.


MSc(Eng) Embedded Systems Engineering

University of Leeds — United Kingdom — 2018-2019

  • Pass with Distinction ~86%
  • Final Project: Multi-core SoC Design and Implementation for FPGAs
  • FPGA Design for System-on-Chip
  • Embedded Microprocessor System Design
  • Digital Signal Processing for Communications
  • Medical Electronics and E-Health
  • Secure Hardware Design

BSc (Hons) Computer Science

University of Plymouth — United Kingdom — 2014-2018

  • First Class Honours with Certificate of Professional Industrial Experience
  • Final Project: FPGA-based 16-bit RISC Processor Design
  • Awards: Top Final Student in Computing & Best Final Project
  • Revell Research Systems Prize Winner

Open Source Projects

Out-of-order RISC processor


Coming soon...

Clustered SoC with multiple interconnects


Latency improvements for the Vmicro16 SoC by clustering cores into multiple groups and using multiple-level interconnects.

Multi-core RISC SoC for FPGAs


Multi-core RISC SoC with various peripherals including: watchdogs, timer interrupts, GPIO, UART, and more.

FPGA 16-bit Embedded Processor


16-bit RISC processor design and implementation for Xilinx Spartan-6 FPGAs featuring pipelining, on-chip memory, GPIO, and UART modules.

Arm Cortex M0 Processor Board


A 2-layer board for the Minispartan6+ FPGA development kit. Features an STM32F0 TSSOP processor, mutliple power supplies, I2C, ICSP, and LEDs.

FPGA and JTAG Development Board


PCB board for the FT2232H Mini Module and TinyFPGA AX2 for testing JTAG and I2C implementations.

CFG Compiler and Assembler


Compiler and assembler for the PRCO embedded processor. Features simple optimisations including constant folding and unreachable code elimination.

Parallel GPU/CUDA DFT Implementation


Designed, implemented, and evaluated a parallel implementation of the Discrete Fourier Transform.

Read the methodology and results here.

And more on Github...


Gravity Programming Language

marcobambini/gravity — 2.3k stars

A dynamic object-oriented programming language, compiler, and virtual machine, implemented in C.


Verilog, SystemVerilog, FPGA, CPU uarch, ASIC flows, Formal verification, UVM, AMBA